1. Field of the Invention
The present invention relates to a semiconductor device using a thin film transistor (hereinafter referred to as TFT) employing a semiconductor film formed on a substrate. Note that in this specification, the term xe2x80x9csemiconductor devicexe2x80x9d indicates all the devices functioning by utilizing their semiconductor characteristics. Further, the semiconductor device manufactured in accordance with the present invention includes a display device represented by a liquid crystal display device in which a TFT is built-in and a semiconductor integrated circuit (a microprocessor, a signal processing circuit, a high frequency circuit, and the like) under the category.
2. Description of the Related Art
Development of information communication technologies has progressed and a display device as means for receiving information has been shifting from a CRT (cathode ray tube) to a flat panel display. This is because the CRT, which has been conventionally utilized for television display to provide various information, cannot sufficiently cope with the recent increased volume of information (for example, higher quality picture). Further, there also arises a problem in that it cannot sufficiently cope with high resolution for displaying a high quality picture, nor with enlargement of the screen. For example, when enlargement of the screen is to be advanced, the weight of the CRT itself becomes so great that it cannot be easily carried. Further, even in the same screen dimensions, when the resolution is made high, the luminance is degraded and the depth has to be extended. Therefore, installment of the device at home is rather restricted.
Then, as a candidate for a display device which can meet the demand for higher resolution and enlargement of the screen, a flat panel display characterized by being small in size, light-weight, and allowing saving of space is attracting attention. Particularly, a liquid crystal display device has been focused on and research development has progressed on a large scale.
In order to cope with the increased volume of information, the device must be able to write data in a short period of time. Further, in view of saving space and making the device small in scale, a display device is required to build-in a driving circuit. In order to realize such a display device, a TFT for forming a switching element and a driving circuit of a pixel needs to operate at high speed.
As a method of realizing a high speed operation of the TFT, for example, there are considered a method in which a semiconductor layer is made polycrystalline instead of amorphous, and a Dual Gate structure described in JP 2737780 B in which a pair of gate electrodes sandwich the semiconductor layer.
However, although the TFT is formed by using a polycrystalline silicon, its field-effect mobility is equal to or lower than {fraction (1/10)} that of a single crystal silicon, for example, and the electric characteristics thereof are not as good as the characteristics of a MOS transistor formed on the single crystal silicon substrate after all. Further, there arises a new problem in that an OFF-current is increased due to a defect formed on grain boundary.
Moreover, when an integrated circuit is formed by using the TFT, a threshold voltage (Vth) needs to be controlled in order to obtain a desired switching operation. The threshold voltage (Vth) is an important parameter for expressing switching characteristics of the TFT. When this value is shifted from a desired value, it causes a trouble in circuit operation. Therefore, in order to control the threshold, for example, in the case of an n-channel TFT, there is a problem in that the value is shifted to the minus side and a normally-ON state (a state of ON without applying a gate voltage) occurs as a result. In order to prevent this, there is adopted means for shifting the threshold voltage to the plus side by adding an impurity (acceptor) for imparting p-type conductivity in a channel forming region is taken.
Furthermore, a data line side driving circuit is required to prevent deterioration due to a high driving ability (ON-current, Ion) and hot carrier effect to thereby improve reliability. On the other hand, in order to obtain a high quality picture, a switching element of a pixel portion needs to have a low OFF-current (Ioff). As described above, in order to satisfy the demands for the liquid crystal display device, it is important to realize a TFT having characteristics required for the respective circuits.
Conventionally, the threshold control has been performed by adding an impurity element at a low concentration to the channel forming region. However, in the case of the structure in which a pair of gate electrodes sandwich the semiconductor layer, there is a problem in that a possibility of a carrier being caused on an interface between the semiconductor layer and an insulating film is high, the carrier is injected into the insulating film or the interface between the insulating film and the semiconductor layer, and thus the threshold rises. Further, in accordance with an energy band structure of this channel forming region, a path of the carrier exists only in the vicinity of the interface between the semiconductor layer and the insulating film. Therefore, there is a serious problem in that the hot carrier accelerated due to the voltage applied to the drain is injected into the insulating film or the interface between the insulating film and the semiconductor layer, and thus the mobility and a drain current are lowered.
Therefore, in view of the above-mentioned problems, an object of the present invention is to realize a highly reliable semiconductor device in which a high drain current and a high field-effect mobility are achieved.
The present invention relates to a semiconductor device comprising: a first gate electrode formed on an insulating surface; a first gate insulating film formed on the first gate electrode; a first semiconductor layer formed on the first gate insulating film; a second semiconductor layer formed on the first semiconductor layer; a third semiconductor layer formed on the second semiconductor layer; a second gate insulating film formed on the third semiconductor layer; and a second gate electrode formed on the second gate insulating film, characterized in that a channel region in which an intrinsic second semiconductor layer is formed is included between the first semiconductor layer and the third semiconductor layer in each of which an impurity element for imparting one conductivity is added at the concentration of 1xc3x971015 to 1xc3x971017/cm3.
Further, the present invention is a semiconductor device comprising an n-channel TFT and a p-channel TFT on the same substrate,
characterized in that:
the n-channel TFT and the p-channel TFT each have a first gate electrode on an insulating surface, a first gate insulating film on the first gate electrode, a first semiconductor layer on the first gate insulating film, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a second gate insulating film on the third semiconductor layer, and a second gate electrode on the second gate insulating film;
channel regions of the first and third semiconductor layers of the n-channel TFT contain an impurity element for imparting p-type conductivity at the concentration of 1xc3x971015 to 1xc3x971017/cm3;
a channel region of the second semiconductor layer of the n-channel TFT is formed of an intrinsic semiconductor or a semiconductor which contains an impurity element for imparting p-type conductivity at the concentration of 1xc3x971015/cm3 or lower;
channel regions of the first and third semiconductor layers of the p-channel TFT contain an impurity element for imparting n-type conductivity at the concentration of 1xc3x971015 to 1xc3x971017/cm3;
a channel region of the second semiconductor layer of the p-channel TFT is formed of an intrinsic semiconductor or a semiconductor which contains an impurity element for imparting n-type conductivity at the concentration of 1xc3x971015/cm3 or lower, and
the second semiconductor layer is formed between the first semiconductor layer and the third semiconductor layer in each of the n-channel TFT and the p-channel TFT.
When a voltage higher than a threshold voltage, which causes an inversion state, is applied to the TFT of the present invention, an inversion layer is widely formed in the intrinsic second semiconductor layer serving as a potential barrier, which is formed between the first semiconductor layer and the third semiconductor layer in each of which an impurity element for imparting one conductivity type is added. As a result, an area where the carrier flows is increased, the drain current becomes large, and thus a sub-threshold coefficient (S value) becomes small. An element of which S value is small can be said to be an ideal switch capable of fast switching operation.
Moreover, since the main inversion layer is formed in the second semiconductor layer, the carrier caused in this region is not scattered on the interface between the insulating film and the semiconductor layer. In comparison with a TFT having the structure of the conventional channel region, the value of field-effect mobility is improved. Furthermore, the second semiconductor layer is surrounded by a potential generated by a Fermi energy difference between the first semiconductor layer and the second semiconductor layer, or between the second semiconductor layer and the third semiconductor layer. This potential prevents the hot carrier caused in the second semiconductor layer from scattering and being injected into the insulating film. As a result, with the structure of the channel region of the present invention, an influence of the hot carrier degradation on the drain current can be reduced.
Note that the channel region is a region of the inversion state (i.e. a region having the inversion layer) in the semiconductor layer in which the carrier flows.